Free Claim Construction Opening Brief - District Court of Delaware - Delaware

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IN THE UNITED STATES DISTRICT COURT FOR THE DISTRICT OF DELAWARE LG DISPLAY CO., LTD., Plaintiff, v. CONSOLIDATED CASES CHI MEI OPTOELECTRONICS CORPORATION, et al. Defendants. Civil Action No. 06-726 (JJF) Civil Action No. 07-357 (JJF)

OPENING CLAIM CONSTRUCTION BRIEF OF PLAINTIFF LG DISPLAY CO., LTD.

BAYARD P.A. Richard D. Kirk Ashley B. Stitzer Stephen B. Brauerman 222 Delaware Avenue, 9th Floor P.O. Box 25130 Wilmington, DE 19899-5130 (302) 655-5000 [email protected] [email protected] Attorneys for Plaintiffs LG Display Co., Ltd. and LG Display America, Inc.

Of Counsel: Gaspare J. Bono R. Tyler Goodwyn, IV Lora A. Brzezynski Cass W. Christenson MCKENNA LONG & ALDRIDGE LLP 1900 K Street, N.W. Washington, D.C. 20006 (202) 496-7500

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TABLE OF CONTENTS Page NATURE AND STAGE OF THE PROCEEDINGS.................................................................. 1 SUMMARY OF ARGUMENT ................................................................................................. 1 BACKGROUND FACTS.......................................................................................................... 2 ARGUMENT ............................................................................................................................ 5 I. II. CLAIM CONSTRUCTION PRINCIPLES..................................................................... 5 PROPOSED CONSTRUCTION OF CLAIM TERMS OF THE LGD PATENTS .......... 6 A. U.S. Patent No. 5,019,002 ­the "ESD Protection" patent .................................... 6 1. "interconnecting substantially all of said row and column lines to one another and substantially all of said column lines to one another" (claim 1)................................................................................... 7 a. b. c. 2. 3. B. "interconnecting" ....................................................................... 7 "substantially all"....................................................................... 8 "to one another".......................................................................... 9

"resistance" (claim 1) ........................................................................... 10 "outer electrostatic discharge guard ring" and "removing said outerguard ring and row can column interconnections" (claim 1) ........ 11 "oxidizing atmosphere" (claim 1) .......................................................... 13 "forming...on"/ "depositing on said gate electrode and substrate"/ "depositing on" (claim 1) ...................................................................... 13 "serving as at least part of a mask"/"said source and drain electrode serving as at least part of a mask"/"mask" (claim 1) .............. 14 "selectively removing" / "selectively removing said conducting film exposed on said island region" (claim 1)............................................... 15 "continuously depositing" / "depositing"(claim 1)................................. 15 "one of said first and second conductive layers" / "one" (claim 1)......... 16 "connected to" (claim 1) ....................................................................... 18 "conductive layer" (claims 1, 10, and 11).............................................. 19 "gate pad" / "source pad" (claims 10 and 11) ....................................... 20

U.S. Patent No. 4,624,737 ­the "Improved TFT" patent ................................... 12 1. 2. 3. 4. 5.

C.

U.S. Patent No. 5,825,449 ­the "Substrate Wiring Design" patent .................... 16 1. 2. 3. 4.

D.

U.S. Patent No. 5,905,274 ­"Single Photoresist Hillock Protection" patent....... 20

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TABLE OF CONTENTS (continued) Page 1. 2. 3. E. "the first metal layer being wider than the second metal layer by about 1 to 4 µm" (claims 1 and 4) ......................................................... 21 "double-layered structure" (claims 1 and 4).......................................... 23 "a second metal layer disposed on the first metal layer" (claims 1 and 4).................................................................................................... 24 "a total width of the first metal layer is greater than a total width of the second metal layer by about 1 to 4 µm" (claim 7) and "the first metal layer being etched to have a width greater than a width of the second metal layer by about 1 to 4 ·m" (claim 16) ...................... 24 "double layered metal gate" (claim 7)................................................... 24 "forming a second metal layer on the first metal layer" (claim 7) and "depositing a second metal layer on the first metal layer" (claim 16) ............................................................................................. 25 "waking" (claim 16) .............................................................................. 25 "first etching layer" (claim 10).............................................................. 25 "a total width of the first metal layer being greater than a total width of the second metal layer by about 1 to 4 ·m" (claim 1)............... 25 "double layered metal gate" (claim 1)................................................... 26 "having a first metal layer and a second metal layer thereon" (claim 1) ............................................................................................... 26 "having an opening therein" (claims 17 and 25).................................... 27 "the opening includes a first opening portion and a second opening portion" (claim 25) ............................................................................... 28 "substantially surrounding the drain electrode" (claim 1) ..................... 28 "forming a main sealant" (claim 1) ....................................................... 30 "wherein the auxiliary sealant and the main sealant are contiguous" (claim 1)............................................................................ 30 "preparing a lower and an upper substrate" (claim 1) .......................... 31

U.S. Patent No. 6,815,321 ­"Single Photoresist Hillock Protection" patent....... 24 1.

2. 3.

4. 5. F. 1. 2. 3. G.

U.S. Patent No. 7,176,489 ­ "Single Photoresist Hillock Protection" patent...... 25

U.S. Patent No. 6,664,569 ­ the "Improved Picture Quality" patent.................. 26 1. 2. 3.

H.

U.S. Patent No. 7,218,374 ­ the "ODF Seal" patent.......................................... 29 1. 2. 3.

I.

USP 6,803,984 ­ the "Serial Production Process Line" patent........................... 32

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TABLE OF CONTENTS (continued) Page 1. 2. "on a single production process line" (claim 1)..................................... 34 "passing the first and second substrates through a sealing material coating portion of the single production process line in serial order" (claim 1) .................................................................................... 34 a. b. 3. III. A. B. "sealing material coating portion of the single production process line".............................................................................. 35 "serial order" ............................................................................ 36

"assembling" (claim 1).......................................................................... 36

PROPOSED CONSTRUCTION OF CLAIM TERMS OF THE AUO PATENTS........ 37 U.S. Patent No. 7,101,069 ­ the "Elongated Lamp Support" patent .................. 37 1. 1. C. "fitting portion" and "two side walls" (claims 1 and 16)........................ 38 "on outer surfaces of said first edge a plurality of first hooks are formed to protrude outwardly" (claim 1)............................................... 41 "a first supporting portion, disposed on the frame" (claims 1 and 16) ........................................................................................................ 44 "a first constraining portion" (claims 1 and 16) .................................... 45 "disposed in a first position" (claims 1 and 16) ..................................... 46 "area" / "a layer of an insulating substrate, having an area" (claims 1 and 9) .................................................................................... 47 "dummy patterns" (claims 1 and 9) ....................................................... 49 "dummy patterns comprising at least about 30% of the area of the insulating substrate, the dummy conductive patterns situated between the connection pads and the pixel electrodes" (claims 1 and 9).................................................................................................... 50 "plurality of wiring arranged on the insulating substrate" (claim 1)...... 50 "pillars formed higher than other portions of the color filter" (claim 1) and "pillars of a color filter" (claim 9) ................................... 51 "the pillars are covered with the common electrode" (claim 1) ............. 53 "storage capacitance line" (claim 9) ..................................................... 53 -iiiU.S. Patent No. 6,976,781 ­ the "Hooks and Holes Connector" patent.............. 40

U.S. Patent 7,125,157 - the "Optical Film Positioning" patent .......................... 43 1. 2. 3.

D.

U.S. Patent No. 6,689,629 ­ the "Dummy Etching Patterns" patent .................. 47 1. 2. 3.

4. E. 1. 2. 3.

U.S. Patent 5,748,266 -- the "Color Filter Spacer" patent.................................. 51

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TABLE OF CONTENTS (continued) Page F. U.S. Patent 5,748,944 - the "Spacer Hardness" patent....................................... 54 1. 2. 3. G. "dynamic hardness value" and "hardness value of plastic deformation" (claims 1 and 4) ............................................................... 55 "at least one of the group consisting of" (claim 4) ................................. 56 "the length of one side of the upper spacer surface" (claim 2) ............... 56

U.S. Patent No. 6,778,160 ­ the "Ideal Brightness Level Determinator" patent ............................................................................................................... 57 1. "so as to make a time integration quantity of a brightness change substantially equal to an ideal quantity of light in a stationary state with respect to the next brightness level" (claim 1)................................ 58 "determinator for determining an output brightness level" (claim 1) ............................................................................................... 60 "brightness level" (claim 1)................................................................... 61 "a storage for storing the previous brightness level of the video signal input through said input logic" (claim 1) .................................... 62 "flexible printed circuit board" (claims 1, 9, and 17)............................. 64 "the first and second flexible printed circuit boards are joined by hot bar soldering" (claim 1) .................................................................. 65

2. 3. 4. H.

U.S. Patent No. 7,090,506 ­ the "Touch Screen Connector" patent................... 63 1. 2.

IV.

PROPOSED CONSTRUCTION OF CLAIM TERMS OF THE CMO PATENTS ....... 66 A. U.S. Patent No. 6,734,926 ­ the "Side Circuit Board" patent ............................ 66 1. 2. "a circuit board installed within the gap for controlling operations of the display apparatus" (claim 1) ....................................................... 66 "a circuit board is installed on the side portion of the reflecting plate for controlling operations of the display apparatus" (claim 15) ........................................................................................................ 68 "being separated from the side portion by a gap" (claims 1 and 9)........ 69 "a series of point light sources" (claims 1, 12, 17, 21 and 26) ............... 70 "diffusive reflective surfaces" (claims 1, 12, 21, and 26) ....................... 72 "oriented relative to the series of point light sources and the waveguide so as to introduce light" (claim 1)........................................ 72 "diffusive reflective optical cavities" (claims 12 and 17) ....................... 73

3. B. 1. 2. 3. 4.

U.S. Patent No. 6,134,092 ­ the "LED and Reflector Backlight" patent ............ 70

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TABLE OF CONTENTS (continued) Page 5. C. "guide members positioned along a periphery of the optical cavity" (claim 21) ............................................................................................. 73 "during formation of said gate lines" and "during formation of said source lines" (claim 1) .......................................................................... 74 "shorting element" (claim 1) ................................................................. 75 "electrically coupling said shorting elements" (claim 1)........................ 76 "protection element" (claim 1) .............................................................. 77 "a layer of a birefringent material" (claim 3) ........................................ 78 "optical symmetry axis" (claim 3) ......................................................... 81 "tilt angle varies along an axis normal to said layer" (claim 3)............. 81 "a desired viewing characteristic over a specified field of view" (claim 29) ............................................................................................. 82

U.S. Patent No. 6,013,923 ­ the "ESD Protection and Testing" patent .............. 74 1. 2. 3. 4.

D.

U.S. Patent No. 5,619,352 ­the "O-Plate Compensator" patent ......................... 77 1. 2. 3. 4.

E.

U.S. Patent No. 6,008,786 ­ "Gamma Correction and Delay Circuits" patent ............................................................................................................... 82 1. 2. "changing the level of gray scale data signals for at least one color relative to the other colors to a different gray scale level" (claim 1)...... 84 "delaying any uncorrected gray scale signal related to the other colors for the time delay caused by said corrected gray scale data signal being corrected" (claim 1) .......................................................... 86 "driver means," "data control means," "computing means," "buffer means," and "adjusting means" (claim 1) .................................. 87 "forming a sealing member having a main portion enclosing a display region" (claim 1) and "overlapping area extends along one side of the display region" (claim 8) ............................................... 88

3. F.

U.S. Patent No. 7,280,179 ­ the "Overlapped Sealant" patent........................... 87 1.

CONCLUSION ....................................................................................................................... 89

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TABLE OF AUTHORITIES Page(s) CASES Alloc, Inc. v. ITC, 342 F.3d 1361 (Fed. Cir. 2003) ......................................................................................80, 86 Bell Atl. Network Servs., Inc. v. Covad Commc'ns. Group, Inc., 262 F.3d 1258 (Fed. Cir. 2001) ........................................................................................... 58 Biomedino, LLC v. Waters Techs. Corp., 490 F.3d 946 (Fed. Cir. 2007)............................................................................................. 87 Board of Regents v. BenQ America Corp., -- F.3d --, 2008 WL 2834704 (Fed. Cir. July 24, 2008) ....................................................... 82 Chimie v. PPG Indus., 402 F.3d 1371 (Fed. Cir. 2005) ........................................................................................... 89 Datamize, LLC v. Plumtree Software, Inc., 417 F.3d 1342 (Fed. Cir. 2005) ....................................................................................... 6, 32 Halliburton Energy Servs. v. M-1 LLC, 514 F.3d 1244 (Fed. Cir. 2008) ........................................................................................... 82 Hockerson-Halberstadt, Inc. v. Avia Group Int'l, Inc., 222 F.3d 951 (Fed. Cir. 2000)............................................................................................. 82 Honeywell Int'l., Inc. v. ITT Indus., Inc., 452 F.3d 1312 (Fed. Cir. 2006) ......................................................................................61, 79 Markman v. Westview Instruments, Inc., 52 F.3d 967 (Fed. Cir. 1995), aff'd, 517 U.S. 370 (1996) .................................................. 5, 6 Moleculon Research Corp. v. CBS, Inc., 793 F.2d 1261 (Fed. Cir. 1986) ........................................................................................... 18 Omega Eng'g, Inc. v. Raytek Corp., 334 F.3d 1314 (Fed. Cir. 2003) ........................................................................................... 79 Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) (en banc)......................................................................passim Purdue Pharma L.P. v. Endo Pharms., Inc., 438 F.3d 1123 (Fed. Cir. 2006) ........................................................................................... 88

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TABLE OF AUTHORITIES (continued) Page

Rexnord Corp. v. Laitram Corp., 274 F.3d 1336 (Fed. Cir. 2001) ........................................................................................... 88 SciMed Life Sys., Inc. v. Advanced Cardiovascular Sys., Inc., 242 F.3d 1337 (Fed. Cir. 2001) ......................................................................................79, 85 Spectrum Int'l, Inc. v. Sterilite Corp., 164 F.3d 1372 (Fed. Cir. 1998) ........................................................................................... 18 Union Pac. Res. Co. v. Chesapeake Energy Corp., 236 F.3d 684 (Fed. Cir. 2001)......................................................................................... 6, 32 Ventana Med. Sys., Inc. v. Biogenex Labs., 473 F.3d 1173 (Fed. Cir. 2007) ............................................................................................. 9 Verizon Servs. Corp. v. Vonage Holdings Corp., 503 F.3d 1295 (Fed. Cir. 2007) ................................................................................60, 68, 79 Vitronics Corp. v. Concebtronic, Inc., 90 F.3d 1576 (Fed. Cir. 1996)............................................................................................... 5 Wang Labs., Inc. v. America Online, Inc., 197 F.3d 1377 (Fed Cir. 1999) ............................................................................................ 79

STATUTES 35 U.S.C. § 112 ....................................................................................................... 56, 57, 82, 87

OTHER AUTHORITIES Merriam-Webster Dictionary (1980)......................................................................................... 10 IEEE The Authoritative Dictionary of IEEE Standard 7th ed. (2000) ......................................... 49 Merriam-Webster Dictionary (1994).................................................................. 35, 36, 37, 69, 72 Penguin Dictionary of Electronics, 3rd ed. 1998 ........................................................................ 20

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NATURE AND STAGE OF THE PROCEEDINGS These proceedings involve three related patent infringement cases concerning 23 patents. LG Display Co., Ltd. ("LGD") brought the first-filed case (C.A. 06-726) in this District. AU Optronics Corporation ("AUO") and Chi Mei Optoelectronics Corporation ("CMO") responded by filing suits in Wisconsin ("AUO Action") and Texas ("CMO Action") against both LGD and its affiliate LG Display America, Inc. ("LGD America"). Both cases have since been transferred here for consolidation. LGD is alleging that AUO and CMO infringe nine patents (the "LGD Patents"). AUO is asserting eight patents (the "AUO patents") against LGD and LGD America. CMO is asserting six patents (the "CMO Patents") against LGD and LGD America. The parties have identified claim terms for claim construction briefing and filed their Joint Claim Construction Statement. (D.I. 376, Exs. A through W.) SUMMARY OF ARGUMENT LGD's proposed constructions are provided in the Joint Statement and are addressed in the Argument section for each patent. Given the large number of terms in dispute, LGD has only addressed the key terms in this brief. LGD's proposed constructions and intrinsic support for all disputed terms, however, are set forth in exhibits accompanying this brief. In addition to those terms in dispute for which LGD proposes a construction, there are also a number of terms which LGD contends are indefinite, as identified in the Joint Claim Construction Chart. D.I. 376 at Ex. K-2, 6; Ex. L-1-4; Ex. M-13, 15; Ex. R-2; Ex. S-2, 6; Ex. V-4, 5.1 References in this brief to an
1

Ex. L-1 (LGD `002 Patent); Ex. L-3 (LGD `737 Patent); Ex. L-5 (LGD `449 Patent); Ex. L-7 (LGD `274 Patent); Ex. L-9 (LGD `321 Patent); Ex. L-10 (LGD `489 Patent); Ex. L-11 (LGD `569 Patent); Ex. L-12 (LGD `374 Patent); Ex. L-14 (LGD `984 Patent); Ex. L-16 (AUO `069 Patent); Ex. L-17 (AUO `781 Patent); Ex. L-18 (AUO `157 Patent); Ex. L-20 (AUO `629
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LGD Patent, AUO Patent, or CMO Patent are made to Joint Exhibit 1 ("JX 1"), by which the parties are jointly submitting copies of the patents-in-suit. Similarly, references herein to the prosecution histories of an LGD Patent, AUO Patent, or CMO Patent are made to Joint Exhibit 2 ("JX 2"), by which the parties are submitting copies of the cited documents from within the U.S. prosecution histories for the patents in suit. For the Court's reference, complete copies of the prosecution history for each patent in suit (which in several cases exceed a thousand pages in length) are being jointly submitted to Chambers on compact disk. BACKGROUND FACTS Liquid crystal display (LCD) technology is widespread, from watches and calculators to large screen televisions and monitors. LCD technology has evolved and improved significantly from the days of its first application in watches and calculators to today's flat screen televisions and monitors, but its basic technology has not changed. Today's LCD displays include features shared with the earliest designs, including an LCD panel, driver circuitry, and backlight unit. At the same time, additional features have improved LCD displays, such as compensation films that allow a wide viewing angle. LCD manufacturing technology has also evolved along with improvement in image quality of LCD displays. An LCD panel includes a liquid crystal ("LC") layer between two substrates: a color filter ("CF") substrate and a thin film transistor ("TFT") substrate. The CF substrate includes three

(Footnote cont'd from previous page.)

Patent); Ex. L-22 (AUO `266 Patent); Ex. L-23 (AUO `944 Patent); Ex. L-24 (AUO `160 Patent); Ex. L-25 (AUO `506 Patent); Ex. L-26 (CMO `926 Patent); Ex. L-28 (CMO `092 Patent); Ex. L-30 (CMO `923 Patent); Ex. L-32 (CMO `352 Patent); Ex. L-33 (CMO `786 Patent); Ex. L-34 (CMO `179 Patent).

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color filters to provide color images on the LCD display, and the TFT substrate includes thin film transistors, each dedicated to control a pixel of the display. TFTs are manufactured directly on the substrates using semiconductor manufacturing technology, which has steadily improved over the last 25 years. For example, the ability to form the TFTs in a vacuum chamber without exposure to oxygen has improved the performance of the TFTs. Also, the number of steps used to make a TFT has decreased steadily, reducing the cost of manufacturing a TFT and thereby decreasing the ultimate cost to consumers. The transistor itself has also improved. By using a dual metal structure for the gate electrode, including aluminum on the bottom and molybdenum on top, the overall transistor is less prone to failure which could damage a pixel. The reduction of parasitic capacitance and misalignment between the gate and drain of the TFT has improved pixel flickering, image retention, and gray scale non-uniformity. Moreover, the ability to protect TFTs from electrostatic discharge (ESD) that inevitably occur during manufacturing has increased yield rates to again lower cost. The circuitry that forms an ESD guard ring to protect the TFTs is now crucial to making LCD products. In some instances, additional patterns (called "dummy patterns") made of conductive elements are formed on the TFT substrate to provide a nonelectrical function to assist in the manufacturing process. When the two substrates are each complete, they are assembled together. For decades, the two substrates were assembled with a gap between them to accommodate a liquid crystal layer, which was subsequently injected into the gap through a hole using vacuum. This cell gap was maintained using "spacers" made of round polymers spread onto one of the substrates prior to assembly. Prior to the increase in screen size to over 15 inches and beyond, the liquid crystal injection method was acceptable, but due to the time needed to uniformly fill the gap using

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vacuum, this method became impractical for producing large screen displays. Thus, the industry needed to develop "one drop fill" (ODF) technology for mass production where the liquid crystal layer is first applied onto one of the substrates before the two substrates were assembled. This dramatically decreased the time needed to fill the cell gap with liquid crystal and paved the way for large screen LCD displays to become a commercial reality. To utilize the ODF technology, column spacers or pillars replaced round or ball spacers. The column spacers, using the same or similar materials as the ball spacers, were now formed at strategic locations on one of the substrates instead of spreading already manufactured "balls" onto the substrate. Moreover, the sealing material had to be applied consistent with the ODF technology onto one of the substrates to assemble and seal the two substrates together with no holes since post-assembly liquid crystal injection was not required. To further reduce manufacturing cost, a technology was also developed to use a single manufacturing line to process both the CF and TFT substrates instead of using dedicated lines, one for each substrate. Once the LCD panel is formed, driver circuitry is attached at specific locations. The driver circuitry including gate or scan drivers and source or data drivers applies appropriate signals to the individual TFTs to operate each pixel of the display. When the signals are applied, the liquid crystal molecules are moved in desired directions according to the signals to display the images. The driver circuitry may also compensate for inherent material characteristics using techniques such as overdrive and gamma correction. The overdrive technique has been around for decades and refers to applying a voltage initially at a level higher than the desired voltage in an attempt to quickly reach the desired voltage. This allows the liquid crystal molecules to physically move faster to ultimately prevent blurring of images when there is fast action. For example, in a baseball game, LCD televisions

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were not able to clearly show the ball flying across the screen because the liquid crystal molecules were not able to move fast enough, i.e., the liquid crystal response time was slow. The overdrive technique reduces liquid crystal response time to improve video images. Gamma correction refers to the need to compensate for the nonlinear relationship between video signal voltage and light intensity needed to display an image. Because of the nonlinear relationship and differing responses for different colors (e.g., red, green and blue), the driver circuitry is designed to modify the incoming video signal to display an image with color correction. The LCD panel with the appropriate driver circuitry is assembled with a backlight unit (BLU). The backlight unit simply shines light through the LCD panel as controlled by the liquid crystal molecules. The BLU includes various components, including a light source such as florescent tubes and light emitting diodes; light distributing structures such as reflectors, diffusers and light guides; and a housing. ARGUMENT I. CLAIM CONSTRUCTION PRINCIPLES Claim construction is a question of law. Markman v. Westview Instruments, Inc., 52 F.3d 967, 977-78 (Fed. Cir. 1995), aff'd, 517 U.S. 370, 388-90 (1996). In interpreting a claim, a court should look first to the intrinsic evidence, i.e. the patent itself, including the claims and the rest of the specification, and, if in evidence, the prosecution history. Vitronics Corp. v. Concebtronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996). Although it is within the sound discretion of a court to use extrinsic evidence as an aid in construing a claim, extrinsic evidence is "unlikely to result in a reliable interpretation of patent claim scope unless considered in the

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context of the intrinsic evidence." Phillips v. AWH Corp., 415 F.3d 1303, 1319 (Fed. Cir. 2005) (en banc). A claim term should be construed to mean "what one of ordinary skill in the art at the time of the invention would have understood the term to mean." Markman, 52 F.3d at 986. However, "the person of ordinary skill in the art is deemed to read the claim term not only in the context of the particular claim in which the disputed term appears, but in the context of the entire patent, including the specification." Phillips, 415 F.3d at 1313. Thus, the specification is usually "dispositive; it is the single best guide to the meaning of a disputed term." Id. at 1315 (quoting Vitronics, 90 F.3d at 1582). In other words, a claim term can be given its correct construction only within the context of "what the inventors actually invented and intended to envelop with the claim." Phillips, 415 F.3d at 1316. A claim is indefinite only if it is "not amenable to construction" or is "insolubly ambiguous." Datamize, LLC v. Plumtree Software, Inc., 417 F.3d 1342, 1347 (Fed. Cir. 2005). A term is not "indefinite" simply because it is difficult to construe. If the term can be given a reasonable, even if reasonably debatable, meaning, it is not indefinite. Id. at 1347; see also Union Pac. Res. Co. v. Chesapeake Energy Corp., 236 F.3d 684, 692 (Fed. Cir. 2001) (providing that the definiteness inquiry "focuses on whether those skilled in the art would understand the scope of the claim when the claim is read in light of the rest of the specification"). II. PROPOSED CONSTRUCTION OF CLAIM TERMS OF THE LGD PATENTS A. U.S. Patent No. 5,019,002 ­the "ESD Protection" patent

The `002 patent is directed to protecting flat panel displays from electrostatic discharge ("ESD") during their manufacture and subsequent use. 2:45-51. Electrostatic discharge occurs when there is a transfer of electrostatic charge between two objects, the stress of which can

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permanently damage sensitive electronic components. An electrostatic discharge between the row and column lines of a TFT array may render one or more transistors, and the corresponding pixels, inoperative. 2:57-62; 4:46-60. These display defects, arising from ESD, can radically decrease production yields and correspondingly increase the manufacturing cost per unit. 2:1142, 4:46-60. In order to protect against ESD, the `002 patent discloses a method of providing a conductive path (in the form of one or more electrostatic discharge guard rings), which serves to disperse charge. 2:45-68. The `002 patent was previously litigated by LGD in this Court, in a case titled LG.Philips LCD Co., Ltd. v. Chunghwa Picture Tubes Ltd., et al., C.A. No. 05-292-JJF. The Court provided its claim construction for the `002 patent on June 13, 2006 (Ex. L-2 (a)), and the case proceeded to trial in July 2006. At trial, however, the parties disagreed regarding how to apply the Court's construction of two important terms, namely "interconnecting" and "resistance." Notably, these two terms are again at issue. In an effort to resolve potential ambiguities, and thereby facilitate trial of the `002 patent, LGD proposes clarifications of the Court's prior constructions for these two terms. 1. "interconnecting substantially all of said row and column lines to one another and substantially all of said column lines to one another" (claim 1)

At the heart of the parties' disputed constructions are the questions of how the lines are to be interconnected (by what material), how many lines are to be interconnected (whether "substantially all" includes "all"), and in what manner the lines are to be interconnected. a. "interconnecting"

This Court previously construed the term "interconnecting" to mean "electrically connecting with conductors." Ex. L-2(a) at 1. Subsequently, at trial in 2006, the defendants

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argued that the term "conductors" should be read narrowly, limited to certain types of materials, such as metal. LGD, however, argued that the term should be understood in a manner conducive to the operation of the claimed invention and, therefore, includes conductive material. LGD seeks to clarify this ambiguity. As CMO was not a party to the previous case, it may not have been aware of the ambiguity and simply proposed the earlier construction without clarification. There is no basis to limit the construction of "interconnecting" to only certain types of conductive materials. The specification provides that the purpose of the `002 invention is to protect the array by providing a "conductive path" for dispersal of electrostatic charge. 2:45-68. Neither the patent nor its prosecution history contemplate that the type of conductive material would be limited, e.g., to metal rather than including semiconductor. Indeed, a semiconductor may be used effectively to provide the "interconnection" claimed in the `002 patent. JX 2 (`002 Pros. Hist.) (March 31, 1989 Office Action; U.S. Patent No. 4,803,536 (Tuan) Fig. 5(a); 4:45-57; 5:30-34). LGD's proposed construction, "electrically connecting with conductive material," is consistent with the claim language, the specification, and its prosecution history. b. "substantially all"

Each of the parties agree that "substantially all" does not require all. The dispute is whether "substantially all" permits all. One of skill in the art would recognize that it does. A purpose in the `002 patent is preventing damage caused by ESD. One approach would be to connect all the row/column lines. One of skill in the art would recognize, however, that dummy row or column lines may exist at the periphery of the display area that may not necessarily be interconnected. Thus, the claim language "substantially all" covers both situations. As such, LGD proposes the term means "all or nearly all."

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AUO and CMO, conversely, propose that "substantially all" precludes all. CMO proposes "nearly all, but not all," and AUO proposes "almost all." See D.I. 376 at B-3. In the `002 patent, the "Summary of the Invention" states that it intends to "provide[ ] improved methods of manufacturing backplanes and the resulting flat panel displays to increase the manufacturing yield, decrease manufacturing costs and substantially eliminate fatal display defects caused by electrostatic discharge during manufacture and thereafter." 2:45-51. AUO's and CMO's constructions conflict with the `002 patent, because connecting all or nearly all achieves this stated goal. Furthermore, taken logically, if all row/column lines are connected, then certainly at least nearly all are also connected. To exclude the situation where all are connected needs a clear disavowal of scope, which is not present. See generally Ventana Med. Sys., Inc. v. Biogenex Labs., 473 F.3d 1173, 1180-82 (Fed. Cir. 2007). Defendants' constructions should be rejected. c. "to one another"

Another portion of the disputed term is "to one another." This relates to the manner in which the row and column lines must be interconnected. In view of the disclosure in the `002 patent, LGD proposes this means connecting "to at least one other." LGD's proposed construction contemplates that the guard rings (both inner and outer) described by the patent may be implemented in a variety of ways, whether to provide partial, complete, or even coextensive protection. Figure 4 of the patent, for example, depicts connected pairs of row and column lines, as being interconnected. Fig 4; 5:65-68; 6:4-9. Similarly, the patent observes that "[m]odification and variation of the present invention are possible" and "[t]he ESD guard rings can be utilized separately or together. . . ." 5:49-50; 55-57. Consequently, the `002 patent discloses electrically connecting each row/column line to at least one other row/column line.

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CMO's proposed construction does not appear to address this issue, leaving potential ambiguity. AUO, however, proposed that almost all of the row/column lines must be connected together -- supposedly into a single group of row or column lines. This interpretation is not required by the claims nor even disclosed in the patent. In fact, contradictory interconnections are disclosed. Fig. 4; 2:29-36; 5:65-68; 6:6-9; see also Ex. L-2(c) (U.S. Pat. 4,820,222) at Fig. 7; 7:40-42. Each of defendants' proposed constructions should be rejected; and LGD's proposed construction for the entire disputed phrase as "electrically connecting with conductive material all or nearly all row lines to at least one other row line and electrically connecting with conductive material all or nearly all of the column lines to at least one other column line" should be adopted. 2. "resistance" (claim 1)

The second term at issue during the July 2006 trial was "resistance" and whether it required the term to be limited to a resistor. LGD agrees with this Court's prior claim construction opinion that recognized the term "resistance" is not so limited. Ex. L-2(b) at 10-13. In an effort to remove any ambiguity, LGD proposes that resistance means "a circuit component designed to provide opposition to electric current flowing through itself and to minimize current surge in the TFT array from electrostatic discharge." This Court previously construed "resistance" to mean "a circuit component that has a specified resistance to the flow of electric current and is used to minimize the current surge from electrostatic discharge." Ex. L-2(a) LGD's proposed construction slightly modifies this Court's prior construction by replacing the term "resistance" in the construction with its understood meaning, namely "the opposition offered by a body or substance to the passage through it of a steady electric current." Ex. L-2(d)

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(Merriam-Webster Dictionary (1980)). Additionally, LGD clarified that the current surge must be minimized in the TFT array, to be consistent with the claims and specification. CMO's proposed construction appears to adopt this Court's prior construction without reconciling the earlier ambiguity at trial. AUO's proposed construction for "resistance," conversely, attempts to limit resistance to resistor by requiring "a specified ratio between voltage and the flow of electric current." D.I. 376 at B-8. The Court previously rejected such a construction, noting that "[defendant's] proposed construction unnecessarily limits "resistance" to one specific electrical component, a resistor. There is no support in the intrinsic record for such a narrow interpretation." L-2(b) at 11. Consequently, defendants' proposed constructions should be rejected. 3. "outer electrostatic discharge guard ring" and "removing said outerguard ring and row can column interconnections" (claim 1)

The terms "outer electrostatic discharge guard ring" and "removing said outer electrostatic discharge guard ring and row and column interconnections" have also been previously addressed by this Court. Ex. L-2(a) (June 13, 2006 Order) at 1-2. These constructions were not an issue during the July 2006 trial. LGD proposes that the Court adopt the previous constructions of "outer electrostatic discharge guard ring" (which the Court defined as "a closed or open ring, or open L or C-shaped line, outside the active matrix display to provide protection from electrostatic discharge") and "removing said outer guard ring and row and column intersections" (which the Court defined as "physically disconnecting said guard ring and row and column interconnections"). Id. These constructions provide clear meaning of the disputed terms in the context of the claims and specification and therefore should be adopted.

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AUO contends that the term "removing said interconnection prior to completion of the display" is indefinite.2 D.I. 376 at 10. LGD notes, however, that this term did not present any ambiguity or confusion at the prior trial of the `002 patent. Further, CMO joins LGD in proposing that the Court adopt its prior construction of these terms. B. U.S. Patent No. 4,624,737 ­the "Improved TFT" patent

The `737 patent was previously litigated in LG.Philips LCD Co., Ltd. v. Tatung Co. of America, et al., Case No. CV 02-6775 CBM (JTLx), C.D. Cal. ("the CPT California litigation"), where the Court addressed a number of terms in dispute here. Defendants identified approximately 40 terms as requiring construction, many of which were already construed. LGD asserts that this Court adopt constructions of the California Court, as shown in Ex. L-4(a), (b), which includes that Court's constructions. The `737 patent was fundamental to the development of liquid crystal displays. Prior to this invention, a masking step was performed before the deposition of the n+ amorphous silicon film which resulted in natural oxide forming on the exposed surface of the amorphous silicon creating an electrical resistance between the source and drain that impaired the performance of the transistor. 1:41-44. The `737 invention was directed to, inter alia, preventing the formation of natural oxide by continuously depositing the gate insulating layer, the amorphous silicone layer, and the conducting film (containing at least a low resistivity semiconductor layer) without exposing them to an oxidizing atmosphere. 2:20-23; 3:53-56. By removing the masking step after the amorphous silicon layer, and not exposing the films to an oxidizing atmosphere, no
2

Defendants asserted several other terms are indefinite. LGD contends these terms would readily be understood by one of skill in the art as set forth in its proposed constructions previously submitted to the Court. D.I. 376 at Ex. B.

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oxide is formed thus improving the contact and performance of the thin film transistor. 3:52-57, 4:10-12. Further, this method of manufacturing thin film transistors reduced the number of mask steps and associated manufacturing costs. 4:3-6. 1. "oxidizing atmosphere" (claim 1)

This Court should adopt the construction of the California Court for oxidizing atmosphere: "an atmosphere that would create a detectable amount of oxidation on a film." Ex. L-4(a) at 9. The specification sets forth that the invention requires preventing exposure to an atmosphere that forms a natural oxide giving rise to an electrical resistance between the films. 1:41-44. One of skill would thus understand that small or insignificant amounts of oxidizing agents, or an atmosphere that would not impair the electrical characteristics of a thin film transistor, would not be an "oxidizing atmosphere." Indeed, the California Court noted that a "de minimus amount of oxidation is not an `oxidation atmosphere.'" Id. Defendants' proposed constructions ignore the teachings of the specifications and the California Court's construction. 2. "forming...on"/ "depositing on said gate electrode and substrate"/ "depositing on" (claim 1)

LGD asserts that this Court should adopt the California Court's construction of "forming...on" as "giving form or shape to...above and supported by or in contact with." Ex. L4(a) at 14. The claim language and the specifications mandate that "on" refers to "above and supported by or in contact with." Claim 1 recites: continuously depositing on said gate electrode and substrate a gate insulating film, a high-resistivity semiconductor film, and a conducting film containing at least a low resisitivity semiconductor film (emphasis added). The claim recites depositing three layers on the gate electrode and substrate. In addition, as shown in Figs. 2b and 3b of the specifications, the first gate insulating film would be the only film that is in contact with the gate electrode and the substrate. The remaining two -13-

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films, the high-resistivity semiconductor film and conducting film containing at least a lowresistivity semiconductor film, are not in contact with but are above and supported by the gate electrode and substrate. Similarly, claim 1 requires: a third step in which said high-resistivity semiconductor film and said conducting film are selectively etched so that they are partly left as an island region on said gate electrode, (emphasis added). As described above, the semiconductor layer is deposited on the gate insulating film. Consequently, the semiconductor layer does not contact the gate electrode. Defendants' proposed construction contradicts each of the embodiments. Figs. 2a-2e, 3a-3d. Furthermore, Defendants' construction is meritless because other elements of the claim specifically use the term "contacting," for example "a source electrode and a drain electrode both contacting part...." Thus, "on" should not be construed to require "contacting". AUO also proposes that "forming" should be construed as "producing." D.I. 376 at A-3. This assertion provides no guidance to the meaning of the term and is unnecessary. One of skill in the art would understand the meaning "of forming" is "to give form or shape to" which should be adopted. 3. "serving as at least part of a mask"/"said source and drain electrode serving as at least part of a mask"/"mask" (claim 1)

LGD asserts that this Court adopt a slightly modified version of the California Court's construction to be "serving as at least a part of the pattern above a surface from which material is to be selectively removed, where the pattern is made of material that is resistive to the removal technique relative to the material to be removed." Ex. L-4(a) at 13. The addition of the words "at least" to the Court's construction mirrors the claim language and should resolve an ambiguity that arose during trial in California. Defendants argue that the electrodes must be "on the top surface" or "partially define the -14-

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boundary," essentially asserting, as CPT had argued in the CPT California litigation, that the electrodes must be the outermost layer. Id. at 12-13. Order re Claim Construction, May 5, 2005, at 12. Specifically rejecting this argument, the California Court stated that "[w]hile the photoresist may be the outermost layer of the mask, the electrodes are part of the mask structure, as they, too, are resistive to the removal technique and in the pattern needed to etch exposed conductive film." Id. Furthermore, Defendants' construction disregards the plain understanding one of ordinary skill would have of the claim language. The claim only requires that the source and drain electrode be "at least a part of a mask" with no further limitations. Defendants are clearly attempting to read improper limitations -- of being the outermost layer and defining the boundaries -- into the claim. To the contrary, and as held by the California Court, the source and drain electrode must only be a part of the mask, not the outermost layer. 4. "selectively removing" / "selectively removing said conducting film exposed on said island region" (claim 1)

LGD proposes the California Court's construction for "selectively removing" as "removing selected regions only" be adopted, and such construction should also apply to the larger phrase. Ex. L-4(a) at 14-15. CMO again improperly tries to import limitations into a term that is contrary to the claim language and the specifications. CMO asserts that the "entire conducting film in the space between the edges of the source and drain electrode" must be etched. D.I. 376 at A-17-18. This importation is unsupported, unwarranted and contrary to the clear meaning of the claim language which states "selectively" removing not removing entirely. Nowhere does the intrinsic evidence support CMO's erroneous importation. 5. "continuously depositing" / "depositing"(claim 1)

LGD and CMO both propose that this Court adopt the California Court's construction for "continuously depositing" as "the formation of the gate insulating film, the high-resistivity -15-

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semiconductor film and the conducting film without intervening films." D.I. 376 at A-5. AUO's argument that depositing should be limited to "chemically precipitating" or "precipitating" is without any basis. The specification describes a number of process methods, for example, plasma CVD, sputtering, photo CVD, molecular beam, or ion beam deposition. Nowhere does it suggest that depositing should be limited to chemically precipitating. 4:13-24. C. U.S. Patent No. 5,825,449 ­the "Substrate Wiring Design" patent

Similar to the `737 patent, claim terms in the `449 patent have already been construed by the Court in the CPT California litigation. Defendants have identified almost 50 terms as requiring construction, many of which were already construed. The terms with the Court's previous constructions are submitted in Exhibits L-6(a), (b). The `449 patent is directed to wiring structures in liquid crystal display devices wherein TFT arrays require hundreds of wiring connections. As discussed in the patent, insufficient insulation between layers, such as between the pixel electrode and the source/drain layer, can result in shorts or opens in the wiring that can cause processing errors fatal to the display. An additional concern is minimizing costs in the design and manufacture of these TFT arrays, for example by reducing the number of mask manufacturing steps to fabricate an array. Thus, the goal of the patent is not only to ensure proper wiring connections throughout the array but to do so in a cost effective manner. 1. "one of said first and second conductive layers" / "one" (claim 1)

The disagreement here is the meaning of the word "one". LGD contends the construction should be "one, but not both, of the first and second conductive layers," as construed by the California Court, while Defendants ask this Court to disagree with that Court and hold that one means "one or more". D.I. 376 at C-8. Defendants' construction obviously fails in view of the

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plain and ordinary meaning of "one", the intrinsic evidence, and sound principles of claim construction. Claims terms are generally construed to have their ordinary and customary meaning as understood by one of skill in the art. Here, the word "one" is a commonly understood word with a well-known and widely accepted meaning -- a single unit. Ex. L-6(c) (Merriam-Webster (1994)). Nowhere do the claims, specification or intrinsic evidence suggest that this plain and ordinary meaning should not apply here, nor is there any basis for this Court to construe "one" to have a different meaning. The claim language demonstates "one" must mean only one for the claim to make sense: wherein one of said first and second conductive layers is connected to one of a plurality of terminals of a thin film transistor. 6:17-19. Notably, the claim limitation twice uses the term one, first referring to the conductive layers and then referring to the plurality of terminals. Thus, if "one" meant "one or more," as asserted by Defendants, the claim would allow for both the first and second conductive layers to be connected to each and every terminal of a thin film transistor, resulting in an unusable device. Any attempt by Defendants to argue that one should include more than one to cover the embodiment shown in Fig. 5 would be meritless as such argument has already been specifically rejected by the court in the CPT California litigation. As explained in that court's order, claim 1 was amended to include the disputed term to overcome the rejection based on U.S. Patent No. 5,162,933 to Kakuda: In the instant case, patentee LG Electronics specifically disavowed an interpretation of the claim that provided for either, or both - in other words, "one or more" - of the conductive layers being connected to a terminal of a thin film transistor;..." Ex. L-6(e) at 2.

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Likewise, any argument by Defendants that the introductory phrase "comprising" permits inclusion of more than one would be meritless. The Federal Circuit has held that even when comprising introduces the claim, it "does not free the claim from its own limitations." Spectrum Int'l, Inc. v. Sterilite Corp., 164 F.3d 1372, 1379-80 (Fed. Cir. 1998). When, as here, a numerical limitation on the structural elements is clear from the language of the claim, the claim is so limited and cannot include more. See Moleculon Research Corp. v. CBS, Inc., 793 F.2d 1261, 1271 (Fed. Cir. 1986) (holding that a claim reciting a transitional phrase "which comprises" does not expand the scope of the recited "eight cube pieces"). 2. "connected to" (claim 1)

LGD proposes that connected to should be defined as "directly connected to." This construction is consistent with its use in the claims. Nevertheless, AUO incorrectly argues that "connected to" should mean "electrically connecting," ignoring that electrically connect is another term identified to be construed. D.I. 376 at C-8. Thus, AUO's attempt to argue that there is no difference in the terms connected to and to electrically connect is fundamentally flawed. The use of different terms in the claims gives rise to a presumption of different meanings. Here, the claims clearly distinguish between the use of connect and electrically connect. For example, comparing claim 1 to the embodiment of figure 3, the claim refers to the conductive layer 7 "connecting directly" to a terminal of the thin film transistor, while "electrically connecting" the second conductive layer, the source pad 2A, to the first conductive layer 7 through a third ITO layer 6C. Thus, the claims demonstrate that connected to refers to directly connecting with the same material while electrically connecting is providing an electrical conduction path, potentially through more than one layer.

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Further, AUO's proposed construction that "connected to" means "electrically connected to" is inconsistent with the language in Claim 1: said indium tin oxide layer extends through said first and second contact holes to electrically connect said first conductive layer with said second conductive layer, and wherein one of said first and second conductive layers is connected to one of a plurality of terminals of a thin film transistor. 6:13-19 (emphasis added). The claim clearly requires that one of and not both of the conductive layers connect to a terminal of a thin film transistor. Moreover, as the first and second layers are already electrically connected to each other, the last element would essentially mean that by connecting one conductive layer to a terminal of thin film transistor, both the first and second layer would be connected to a terminal of a thin film transistor, rendering the one of claim language meaningless. AUO's proposed construction therefore cannot be correct. 3. "conductive layer" (claims 1, 10, and 11)

A conductive layer should be construed as "a thickness of electrically conductive material," as agreed to by the parties in the CPT California litigation. Ex. L-6(b) at 96. By its proposed definition, CMO suggests that the conductive layer of claim 1 refers to the entire layer of a conductive material that may include multiple patterned structures. D.I. at C-2. This argument is contrary to the plain meaning in claim 1 and cannot be applied consistently throughout the claims. For example, claim 10 requires a first conductive layer including different structures, such as a gate pad and source pad, while claim 1 does not. Claim 1 refers to a portion of the entire layer by only requiring "a first conductive layer formed on a first portion of the substrate" and "a second conductive layer formed on a first portion of said insulative layer." In addition, as described in the specification, thin film transistors generally are made of two conductive layers, with intervening semiconductor and insulative layers. If the conductive layer in claim 1 refers to -19-

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the entire conductive layer, the first and second layers would both be necessarily connected to the terminals of the thin film transistors. Thus, CMO's construction cannot be applied to the conductive layer in claim 1. The specification also supports that "conductive layer" can be limited to only one portion of an entire layer. For example, in describing Fig. 3, the specification states: Thus, after patterning, a first transparent conductive layer 6C connects source electrode 7 with source pad 2A, and a second transparent conductive layer 6 (i.e. the pixel electrode) is connected to drain electrode 8. 4:61-64. While different structures were made of the same transparent conductive layer, the specification refers to each separate structure with the term conductive layer. 4. "gate pad" / "source pad" (claims 10 and 11)

LGD asserts the constructions of gate and source pads should be "a portion of patterned electrically conductive material that is provided near the periphery of the thin film transistor array to receive a gate signal" and "a portion of patterned, electrically conductive material that is provided near the periphery of the thin film transistor array to receive a data signal." LGD's construction varies from the California Court's construction to precisely describe the signal type received by the pad that subsequently controls operation of a TFT. Generally, gate and source pads are bonding pads for connecting to external circuitry. For example, bonding pads are defined as "metal pads arranged on a semiconductor chip (usually around the edge) to which wires may be bonded so that electrical connection can be made to the component(s) or circuit(s) on the chip..." Ex. L-6(d) (Penguin Dictionary of Electronics, 3rd ed. 1998)). Therefore, LGD's proposed construction should be adopted. D. U.S. Patent No. 5,905,274 ­"Single Photoresist Hillock Protection" patent

U.S. Patent No. 5,905,274 (and related patents 6,815,321, and 7,176,489) discloses the

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dual purpose of protecting against the development of hillock and maintaining adequate coverage of a gate insulating layer. Aluminum (or other metals with a low resistivity) that are generally used for the gate of flat panel display experience thermal stresses under high temperatures causing hillock, or blisters on the surface of the metal. The blisters result in the gate insulating layer having thin areas that can eventually cause the gate insulator to breakdown causing a short. The `274 patent provides for a range in the difference in width between two layers of the gate to prevent hillock and avoid deficient gate insulator coverage. As noted in the `274 patent background, when the width difference was 4 p.m. or greater, hillock would not be prevented. Conversely, when the difference was too small, the gate insulator coverage would be compromised. Accordingly, the `274 patent discloses that when the difference of width between the first and second layers is greater than 1 ·m and less than 4 ·m, hillock will be prevented and there will be smooth coverage by the gate insulating layer. The `274 patent also describes that two photoresists were used in the etching process of the gate metal layers requiring complex processing and resulting in increased contact resistance between the layers. 2:60-65. To address this issue, the `274 patent is directed to a single etching process where the first and second metal layer are sequentially deposited and etched with a single photoresist. 1. "the first metal layer being wider than the second metal layer by about 1 to 4 µm" (claims 1 and 4)

LGD asserts that "being wider" refers to the entire width of the first metal layer. The claims, specification, intrinsic record, and understanding by one of skill in the art mandates that it must. Accordingly, the proper construction is "the width of the first metal layer, determined by the portion of the first metal layer in contact with the second metal layer together with the portions exposed to the subsequently deposited gate insulating layer, is more than 1µm and less -21-

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than 4µm greater than the width of the second metal layer." This construction is consistent with the context of the claims which also requires that hillock is prevented at the sides of the first metal layer. The specification explains that the invention is directed to hillock at the sides of the first metal layer. 5:34-37; 2:55-60; 3:21-26; 6:40-48. Similarly, the specification identifies the relevant portion as the "side portions of the first metal layer 43 having no second metal layer 45 thereon." 5:22-23; 6:40-42. One of ordinary skill would understand the limitation includes the entire portions where hillock can occur, i.e., where the first metal layer is exposed to the deposited gate insulating layer. Likewise, the specification provides that the width of the first metal layer is the same as the width of the photoresist. 1:53-58; 6:3-6; 6:20-21; Fig. 4A. One of ordinary skill would understand that according to standard etching techniques, the first metal layer could not end up being wider than the photoresist. Cited prior art, for example U.S. 5,156,986, confirms this. See JX F-1. U.S. 5,156,986 to Wei at Figures 2-4. The prosecution history of the `610 patent, a divisional of the `274 patent, also supports LGD's proposed construction. In the August 3, 2001 response, the applicant describes that Wei, GB 2253742, discloses the first and second metal layer having the same width. See Ex. L-8(a). In order to prevent hillock, the exposed portions where the first metal layer containing aluminum contacts a subsequently deposited insulating layer is important. This is supported by arguments made during prosecution, where the applicant distinguished the Miyago reference as teaching a clad structure and an oxide layer. Thus, the claims cover a subsequently deposited gate insulating layer, but not when the metal layers are covered by a clad structure or oxide layer. Another aspect of the construction LGD seeks to clarify is that the range is limited to between 1 ·m and 4 ·m, exclusive of these values. Here, the specification only refers to the

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range exclusive of 1 ·m and 4 ·m, and there is no contrary discussion in either the prosecution history or the claims. Further, the background of the invention specifically states that the difference in width equal to 4 ·m was known in the art and would have issues with hillock formation. Accordingly, the range must be construed to exclude 1 ·m and 4 ·m to be consistent with the specification. Only LGD's proposed construction addresses these issues as set forth in the claims, taught in the specification and explained during prosecution of the `274 patent application. 2. "double-layered structure" (claims 1 and 4)

The underlying dispute is whether the gate includes two metal layers or has only two metal layers. Consistent with the claim language